We have developed a new method for numerical selection of power stage toplogies. The new method allows the user to compare topologies and determine which topologies are most suitable for a particular application. The numbers generated by the new method correlate well with component conduction losses and the method includes component weighting factors that ensure an apples-to-apples comparison by ensuring that each candidate uses equal resources. A series of articles on the new method called "Component Stress Factor" (CSF) appears in the March, April, and May 2006 issues of Power Electronics Technology (PET) magazine.
We will make available (email) an Excel file that shows more details of the analysis of the circuit examples in the PET article series. Please, send your name, company affiliation, company address, and email address for a free copy.
We have invented some new topologies that compare favorably to some of the better known topologies and we have referred to some of these in the PET article series. One new topology is the minimum voltage tapped inductor converter. A copy of the patent application can be obtained by request. Please, include your name, company affiliation, company address, and email address. Links to patents which are available from the USPTO are included in the Patents section of this web site. Please, contact us, if you are interested in licensing a patent. We will be offering working circuit models of licensed products to licensees.
CSF.pdf (305k) is a technical paper on topology selection using the CSF method. This article defines the CSF method and provides some insight into how the CSF method can be used to make sensible topology selection decisions.